Implementation of a micro power 15-bit `floating-point' A/D converter

摘要

Micro power A/D converter are required for power sensitive, battery-operated equipment such as hearing aids. This paper overviews the principles of the 15-bit `floating point' converter and presents its implementation in a low voltage 2 μm CMOS technology. The die area is 1.4 by 1.4 mm and the power consumption 50 μW at ±1.25 V and 16 kHz sampling frequency. Measurement showed that the internal noise level is higher then expected resulting in a reduced dynamic range of 13 to 14 bits. Informal listening tests showed a very good speech quality.